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rev 1.3a 3.21.2005 microsemi inc. copyright ? 2000 11861 western avenue garden grove, ca 92841 1 (714) 898-8121 fax: (714) 893-2570 sg1524b/sg2524b/sg3524b regulating pulse width modulator description the sg1524b is a pulse width modulator for switching power supplies which features improved performance over industry standards like the sg1524. a direct pin-for-pin replacement for the earlier device, it combines advanced processing techniques and circuit design to provide improved reference accuracy, and extended common mode range at the error amplifier and current limit inputs. a dc-coupled flip-flop eliminates triggering and glitch problems, and a pwm data latch prevents edge oscillations. the circuit incorporates true digital shutdown for high speed response, while an undervoltage lockout circuit prevents spurious outputs when the supply voltage is too low for stable operation. full double-pulse suppression logic insures alternating output pulses when the shutdown pin is used for pulse-by-pulse current limiting. the sg1524b is specified for operation over the full military ambient temperature range of -55 c to 125 c. the sg2524b is characterized for the industrial range of -25 c to 85 c, and the sg3524b is designed for the commercial range of 0 c to 70 c. +v in reference regulator oscillator to internal circuitry v ref undervoltage lockout p.w.m. error c.l. compensation shutdown q q r s s q q q d t emitter b collector b emitter a collector a -c.l. sense +c.l. sense non-inverting inverting pwm latch toggle f/f memory f/f osc +v in ground r t c t features ? ? ? ? ? 7v to 40v operation ? ? ? ? ? 5v reference trimmed to 1% ? ? ? ? ? 100hz to 400khz oscillator range ? ? ? ? ? excellent external sync capability ? ? ? ? ? dual 100ma output transistors ? ? ? ? ? wide current limit common mode range ? ? ? ? ? dc-coupled toggle flip-flop ? ? ? ? ? pwm data latch ? ? ? ? ? undervoltage lockout ? ? ? ? ? full double-pulse suppression logic ? ? ? ? ? 60v output collectors high reliability features - sg1524b ? ? ? ? ? available to mil-std-883 and desc smd ? ? ? ? ? scheduled for mil-m-38510 qpl listing ? ? ? ? ? radiation data available ? ? ? ? ? lmi level "s" processing available description
rev 1.3a copyright 2000

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absolute maximum ratings (note 1) oscillator charging current .............................................. operating junction temperature hermetic (j, l packages) ............................................ plastic (n, dw packages) ........................................... storage temperature range ............................ lead temperature (soldering, 10 seconds) ................... input voltage (+v in ) .......................................................... collector voltage ............................................................. logic inputs .......................................................... current limit sense inputs ..................................... output current (each transistor) ................................. reference load current ............................................... 42v 60v -0.3v to 5.5v -0.3v to v in 200ma 50ma 5ma 150 c 150 c -65 c to 150 c 300 c note 1. values beyond which damage may occur. thermal data j package: thermal resistance- junction to case , jc .................. 30c/w thermal resistance- junction to ambient , ja ............... 80c/w n package: thermal resistance- junction to case , jc .................. 40c/w thermal resistance- junction to ambient , ja .............. 65c/w dw package: thermal resistance- junction to case , jc ................... 40c/w thermal resistance- junction to ambient , ja .............. 95c/w l package: thermal resistance- junction to case , jc ................... 35c/w thermal resistance- junction to ambient , ja ............ 120c/w note a. junction temperature calculation: t j = t a + (p d x ja ). note b. the above numbers for jc are maximums for the limiting thermal resistance of the package in a standard mount- ing configuration. the ja numbers are meant to be guidelines for the thermal performance of the device/pc- board system. all of the above assume no ambient airflow. note 2: range over which the device is functional. input voltage (+v in ) ................................................ collector voltage .................................................... error amp common mode range ....................... current limit sense common mode range ...... output current (each transistor) .......................... reference load current ........................................ oscillator charging current ............................ 7v to 40v 0v to 60v 2.3v to v ref 0v to v in -2.5v 0 to 100ma 0 to 20ma 25a to 1.8ma oscillator frequency range ........................ oscillator timing resistor (r t ) ......................... oscillator timing capacitor (c t ) .......................... operating ambient temperature range sg1524b .................................................... sg2524b ...................................................... sg3524b ......................................................... 100hz to 400khz 2k to 150k 1nf to 0.1
f -55 c to 125 c -25 c to 85 c 0 c to 70 c recommended operating conditions (note 2) electrical characteristics (unless otherwise specified, these specifications apply over the operating ambient temperatures for sg1524b with -55 c t a 125 c, sg2524b with - 25 c t a 85 c, sg3524b with 0 c t a 70 c, and +v in = 20v. low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) 5.00 3 5 15 50 5.05 20 30 50 5.10 120 4.90 4.80 25 5.00 3 5 15 50 4.95 4.90 25 reference section (note 3) t j = 25 c v in = 7v to 40v i l = 0 to 20ma over operating temperature range over line, load and temperature v ref = 0v output voltage line regulation load regulation temperature stability (note 7) total output voltage range short circuit current v mv mv mv v ma min. typ. max. min. typ. max. 5.10 30 50 50 5.20 120 sg3524b sg1524b/2524b units test conditions parameter undervoltage lockout section threshold voltage note 3. i l = 0ma v 4.9 4.5 4.2 4.7 4.5 4.3 rohs peak package solder reflow temp. (40 sec. max. exp.)...... 260c(+0, -5)
rev 1.3a copyright 2000

3 !"#$ %& 5 v in = 40v, v shutdown = 2.0v standby current ma 17.5 17 v ce = 60v i c = 10ma i c = 100ma i e = 10ma i e = 100ma r e = 2k , t a = 25 c r c = 2k , t a = 25 c collector leakage current collector saturation voltage emitter output voltage emitter voltage rise time (note 7) collector voltage fall time 200 -3 180 sense voltage input bias current 0.1 2.0 shutdown input section high input voltage high input current low input voltage v shutdown = 5.0v 49 45 v comp = 0.5v v comp = 3.9v minimum duty cycle maximum duty cycle 0.5 1 78 0.2 4.2 90 100 2 60 3.8 70 76 1 error amplifier section (note 5) r s 2k r l 10m i sink = 100
a; v pin 1 - v pin 2 150mv i source = 100
a; v pin 2 - v pin 1 150mv v cm = 2.3v to v ref v in = 7v to 40v t j = 25 c input offset voltage input bias current input offset current dc open loop gain output low level output high level common mode rejection supply voltage rejection gain-bandwidth product (note 7 )

electrical characteristics (continued) 45 0.1 1 50 600 3.5 1 4.0 0.5 42 400 0.6 3.0 0.2 oscillator section (note 4) t j = 25 c v in = 7v to 40v over operating range r t = 150k , c t = 0.1
f r t = 2k , c t = 470pf v in = 40v v in = 7v initial accuracy voltage stability temperature stability (note 7) minimum frequency (note 7) maximum frequency sawtooth peak voltage sawtooth valley voltage clock amplitude clock pulse width min. typ. max. min. typ. max. sg1524b/2524b sg3524b units test conditions parameter note 4. f osc = 45khz (r t = 2700 , c t = .01
f) note 5. v cm = 2.3v to v ref note 6. v cm = 0v to 17.5v note 7. these parameters, although guaranteed over the recommended operating conditions, are not tested in production. 48 1 2 140 3.9 1.2 40 400 0.6 3.0 0.2 45 0.1 1 50 600 3.5 1 4.0 0.5 50 1 2 120 3.9 1.2 khz % % hz khz v v v
s 5 5 1 0.5 60 3.8 70 76 1 2 1 78 0.2 4.2 90 100 2 10 10 1 0.5 mv
a
a db v v db db mhz 0 45 49 % % 0 p.w.m. comparator (note 4) current limit amplifier section (note 6) 220 -10 170 200 -3 230 -10 mv
a output section (each transistor) 1 0.6 2.0 0.1 1 0.6 v ma v
a v v v v
s
s 50 0.4 2.0 0.5 0.2 0.2 1.0 19 18 0.2 0.1 17.5 17 50 0.4 2.0 0.5 0.2 0.2 1.0 19 18 0.2 0.1 power consumption 12 5 12
rev 1.3a copyright 2000

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typical characteristic curves figure 2 sg1524b dead time vs. timing capacitance (r t =2.7k) v in =20v, t a =25c figure 3 sg1524b error amp voltage gain vs. freq over r f v in =20v, t a =25c 100 1000 10000 100000 1000000 1000 10000 100000 1000000 r t (ohm) oscillator freq (hz) 1uf 0.1uf 10nf 3nf 1nf figure 1 oscillator frequency vs. timing resistor and capacitor v in =20v, t a =25 c 0 1 2 3 4 5 0 102030405060708090100 c t (nf) dead time (us) 0 10 20 30 40 50 60 100 1000 10000 100000 1000000 frequency (hz) open loop voltage gain (db) r f =1m r f =300k r f =100k
rev 1.3a copyright 2000

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note 1. contact factory for jan and desc product availablity. 2. all packages are viewed from the top. connection diagrams & ordering information (see notes below) 16-pin ceramic dip j - package 2 3 4 5 6 7 8 v ref +v in e b c b c a e a shutdown compensation ground osc. output n.i. input ambient temperature range sg1524bj/883b -55 c to 125 c sg1524bj/desc -55 c to 125 c sg1524bj -55 c to 125 c sg2524bj -25 c to 85 c SG3524BJ 0 c to 70 c sg2524bn -25 c to 85 c sg3524bn 0 c to 70 c 16-pin plastic dip n - package 16-pin wide body plastic s.o.i.c. dw - package sg2524bdw -25 c to 85 c sg3524bdw 0 c to 70 c part no. package connection diagram inv. input c t r t +c.l. sense -c.l. sense v ref +v in e b c b c a e a shutdown compensation ground osc. output n.i. input inv. input c t r t +c.l. sense -c.l. sense 15 16 14 13 10 9 12 11 1 2 3 4 5 6 7 8 1 15 16 14 13 10 9 12 11 20-pin ceramic leadless chip carrier l- package 4 5 6 7 8 321 9 111213 10 14 15 16 17 18 20 19 sg1524bl/883b -55 c to 125 c sg1524bl -55 c to 125 c 11. n.c. 12. comp 13. shutdown 14. e a 15. c a 16. n.c. 17. c b 18. e b 19. +v in 20. v ref 1. n.c. 2. inv. input 3. n.i. input 4. osc. output 5. +c.l. sense 6. n.c. 7. -c.l. sense 8. r t 9. c t 10. ground n package : rohs compliant / pb-free tran sition dc: 0503 n package: rohs / pb-free 100% matte tin lead finish dw package: rohs compliant / pb-free transition dc: 0516 dw package: rohs / pb-free 100% matte tin lead finish

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